-
1 Cache Coherent Non Uniform Memory Architecture
Information technology: CC-NUMAУниверсальный русско-английский словарь > Cache Coherent Non Uniform Memory Architecture
-
2 Cache-Coherent Non Uniform Memory Access
Универсальный русско-английский словарь > Cache-Coherent Non Uniform Memory Access
-
3 cache-coherent non-uniform memory access
Information technology: CC-NUMAУниверсальный русско-английский словарь > cache-coherent non-uniform memory access
-
4 когерентная кэш-память
Russian-English dictionary of telecommunications > когерентная кэш-память
-
5 когерентная кэш-память
Telecommunications: coherent cacheУниверсальный русско-английский словарь > когерентная кэш-память
-
6 транзакция, не требующая когерентности кэша
Information technology: non-cache-coherent transactionУниверсальный русско-английский словарь > транзакция, не требующая когерентности кэша
См. также в других словарях:
Cache coherency — In computing, cache coherency (also cache coherence) refers to the integrity of data stored in local caches of a shared resource. Cache coherence is a special case of memory coherence.When clients in a system maintain caches of a common memory… … Wikipedia
Cache coherence — In computing, cache coherence (also cache coherency) refers to the consistency of data stored in local caches of a shared resource. Multiple Caches of Shared Resource When clients in a system maintain caches of a common memory resource, problems… … Wikipedia
CPU cache — Cache memory redirects here. For the general use, see cache. A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the… … Wikipedia
Write-once (cache coherency) — In cache coherency protocol literature, Write Once is the first write invalidate protocol defined. It has the optimization of executing write update on the first write and a write invalidate on all subsequent writes, reducing the overall bus… … Wikipedia
Scalable Coherent Interface — SCI, for Scalable Coherent Interface, is a high speed computer bus that supports a variety of topologies, speeds and connection systems. It is used primarily in the high performance computing market, where it is used to build NUMA computer… … Wikipedia
Scalable Coherent Interface — Das Scalable Coherent Interface (SCI, englisch) ist in der Computertechnik eine Busähnliche Verbindung zwischen Mehrprozessorsystemen. Es wurde im Standard IEEE 1596 festgeschrieben und in verschiedenen CC Numa Architekturen implementiert. Der… … Deutsch Wikipedia
Direct memory access — (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit (CPU). Without DMA, the CPU using programmed input/output is typically fully… … Wikipedia
Larrabee (GPU) — Larrabee is the codename for a graphics processing unit (GPU) chip that Intel is developing separately from its current line of integrated graphics accelerators. The video card containing Larrabee is expected to compete with GeForce and Radeon… … Wikipedia
Multi-core — A multi core processor (or chip level multiprocessor, CMP) combines two or more independent cores into a single package composed of a single integrated circuit (IC), called a die, or more dies packaged together. The individual core is normally a… … Wikipedia
Cray MTA — The Cray MTA, formerly known as the Tera MTA, is a supercomputer architecture based on thousands of independent threads, fine grain communication and synchronization between threads, and latency tolerance for irregular computations. Each MTA… … Wikipedia
Larrabee — Эта статья содержит информацию о запланированном или ожидаемом будущем чипе. Статья может содержать предварительную и недостоверную информацию и не отображать правильную окончательную спецификацию чипа … Википедия
